The invention relates to electronic devices. More specifically, the invention relates to instruction scheduling for electronic devices based on power estimation.
Traditional electronic devices, such as microprocessors, have scheduled execution of instructions therein, typically, based on hardware resources and data availability in order to maximize their performance. However, with the increase in power consumption due to process technology improvements, these microprocessors may draw more current than the voltage regulator for the microprocessor is capable of supplying. A typical approach to account for this overdrawing of current by these microprocessors includes thermal and digital throttling mechanisms wherein the stream of instructions into the microprocessor are halted through means of an instruction stall, thereby reducing the power being consumed by the microprocessors. Disadvantageously, halting the instruction stream being processed by the microprocessors reduces its performance.
Moreover, current spikes can be introduced into the hardware when the number of instructions being processed by the microprocessor widely vary. For example, if the microprocessor is processing a number of instructions from an instruction-intensive application, followed by a period of no instruction processing and returning to processing a number of instructions from another instruction-intensive application, the amount of current drawn by the microprocessor will vary accordingly.